Semiconductor manufacturers face a constant challenge to comply with Moore's Law. Semiconductor manufacturers constantly strive to continually decrease feature sizes, such as sizes of active and passive devices, interconnecting wire widths and thicknesses, and power consumption as well as increase device density, wire density, and operating frequencies.
With decreased feature sized and increased density, conductive components within a device generally have become closer in proximity. In some instances, this decrease in proximity of conductive components can adversely impact parasitic capacitance within the device. Increases in parasitic capacitance can decrease device operational speed.